About
Chip Design & Verification Flow
Terrain Technologies developed VerIDE - an Eclipse-based integrated development environment (IDE) for SystemVerilog enabling chip designers and verification engineers to reduce project time, improve code quality, avoid re-spins, and reduce chip area and power. VerIDE features on-the-fly incremental compilation, elaboration, pseudo-synthesis and rule checking, all of which are integrated into the editor and provide feedback in seconds. VerIDE helps to minimalize implementation bugs in RTL and testbench, improving project convergence rate and eliminating patchy code.
Identity
| Name | Terrain Technologies |
|---|---|
| Slug | terrain-technologies |
| Type / kind | startup |
| Crunchbase ID | terrain-eda |
| Source _id | agxzfmlsbGlzdHNpdGVyGAsSC05ld19Db21wYW55GICA4Nb7zYEJDA |
Status
| Status | inactive |
|---|---|
| Status reason | Acquired (Inactive) by Synopsys on Feb 2020 - closed due to acquisition |
| Last update | 2026-05-17 |
Location
| HQ country code | IL |
|---|---|
| HQ region/district | North District |
| HQ city | Yokne'am Illit |
| HQ address | Ha-Tsmikha Street 1, Yokne'am Illit, Israel |
Web & social
| https://www.linkedin.com/company/terraineda |
Classifications
Primary sector Industrial Technologies
Sub-sectors
Industrial TechnologiesMicroelectronics & Photonics Solutions
Technologies
Platforms & InterfacesSoftware
Target customers
Industrial ManufacturingDiscrete IndustriesSemiconductors & Electronics
Business models
B2B
Tags
semiconductorselectronic-manufacturinghardwarechips-designindustrial-technologies
Funding
| Total raised | — |
|---|---|
| Current stage | Acquired |
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